phase-locked-loop

A phase-locked loop is a human-made feedback control system that locks the phase and frequency of an internally generated signal to those of a reference input signal. It comprises three functional stages: (1) a phase detector (or phase/frequency discriminator) that compares the reference with the generated signal and outputs an error proportional to their phase difference; (2) a loop filter (low-pass) that smooths the error and sets the loop dynamics; (3) a voltage-controlled oscillator whose frequency is driven by the filtered error, closing the loop so the generated signal tracks the reference in phase and frequency. Parameters: (1) reference frequency — the frequency of the input to be tracked; (2) loop bandwidth — the range over which the loop corrects, set by the loop filter, trading tracking speed against noise rejection; (3) lock range — the band of reference frequencies over which the loop holds lock; (4) capture (pull-in) range — the band of initial frequency offsets from which the loop acquires lock. Mechanism of persistence: it persists as an engineering kind — specified in datasheets and design references (discrete PLL chips and software PLLs), fabricated as integrated circuits for frequency synthesis, clock recovery, and sample-rate conversion, and re-implemented digitally in DSP as a phase accumulator, digital loop filter, and numerically controlled oscillator; every synthesizer, receiver, and digital audio interface that derives a clock from a reference instantiates this one construct. [formal: phase-locked-loop | substrate: matter | horizon: a life | explicit: yes | epoch: 0.01]